Mirror/ppsspp
1
0 Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2026-10-01 14:58:14 +00:00
Code Issues Packages Projects Releases Wiki Activity

CMake: Add checks for getauxval and elf_aux_info

Browse Source 
Add support for CPU feature detection on OpenBSD and FreeBSD riscv64.
This commit is contained in:
Brad Smith committed 2025-01-26 22:44:04 -05:00
1 parent a40cf12593
commit e1916bf1fe
2 files changed
+25 -10
Download Patch File Download Diff File Expand all files Collapse all files

No files matched your search

CMakeLists.txt
+10
View File
@@ -491,6 +491,16 @@ if(NOT MSVC)
elseif(ANDROID)
add_compile_options(-fsigned-char)
endif()
check_symbol_exists(getauxval sys/auxv.h HAVE_GETAUXVAL)
if(HAVE_GETAUXVAL)
add_definitions(-DHAVE_GETAUXVAL)
endif()
check_symbol_exists(elf_aux_info sys/auxv.h HAVE_ELF_AUX_INFO)
if(HAVE_ELF_AUX_INFO)
add_definitions(-DHAVE_ELF_AUX_INFO)
endif()
else()
# Disable warnings about MS-specific _s variants of libc functions
add_definitions(-D_CRT_SECURE_NO_WARNINGS)
Common/RiscVCPUDetect.cpp
+15 -10
View File
@@ -27,7 +27,7 @@
#include <cstring>
#include <set>
#include <sstream>
#ifndef __OpenBSD__
#if defined(HAVE_GETAUXVAL) || defined(HAVE_ELF_AUX_INFO)
#include <sys/auxv.h>
#endif
#include <vector>
@@ -203,7 +203,20 @@ void CPUInfo::Detect()
}
#endif
#ifdef __OpenBSD__
#if defined(HAVE_GETAUXVAL) || defined(HAVE_ELF_AUX_INFO)
#ifdef HAVE_ELF_AUX_INFO
unsigned long hwcap = 0;
elf_aux_info(AT_HWCAP, &hwcap, sizeof(hwcap));
#else
unsigned long hwcap = getauxval(AT_HWCAP);
#endif
RiscV_M = ExtensionSupported(hwcap, 'M');
RiscV_A = ExtensionSupported(hwcap, 'A');
RiscV_F = ExtensionSupported(hwcap, 'F');
RiscV_D = ExtensionSupported(hwcap, 'D');
RiscV_C = ExtensionSupported(hwcap, 'C');
RiscV_V = ExtensionSupported(hwcap, 'V');
#elif defined(__OpenBSD__)
/* OpenBSD uses RV64GC */
RiscV_M = true;
RiscV_A = true;
@@ -211,14 +224,6 @@ void CPUInfo::Detect()
RiscV_D = true;
RiscV_C = true;
RiscV_V = false;
#else
unsigned long hwcap = getauxval(AT_HWCAP);
RiscV_M = ExtensionSupported(hwcap, 'M');
RiscV_A = ExtensionSupported(hwcap, 'A');
RiscV_F = ExtensionSupported(hwcap, 'F');
RiscV_D = ExtensionSupported(hwcap, 'D');
RiscV_C = ExtensionSupported(hwcap, 'C');
RiscV_V = ExtensionSupported(hwcap, 'V');
#endif
// We assume as in RVA20U64 that F means Zicsr is available.
RiscV_Zicsr = RiscV_F;