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VFPU: Build sin, cos, asin, exp2 and log2 results as integer bits
A float made from a constant NaN bit pattern can come out quieted: MSVC turned the 0x7F800001 that vcos, vexp2 and vlog2 return into 0x7FC00001, which failed cpu/vfpu/exact on Windows. Each function now computes its result's bits in integers and converts once at the end, like vrcp and friends already did. Fixed-point results become floats by shifting, which is exact since the VFPU keeps 22 significant bits. Identical to the previous code over every 32-bit input. Co-Authored-By: Claude Opus 5.5 (1M context) <[email protected]>
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Henrik RydgårdandClaude Opus 5.5 committed
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+114
-79
@@ -1570,17 +1570,10 @@ static inline bool vfpu_sin_reduce(uint32_t bits, uint32_t *angle, bool *odd) {
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return true;
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}
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static inline float vfpu_sin_from_reduced(uint32_t angle, bool negate) {
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if (angle > 0x00800000u) angle = 0x01000000u - angle;
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return (negate ? -1.0f : +1.0f) * float(int32_t(vfpu_sin_fixed(angle))) * 3.7252903e-09f; // 0x1p-28f
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}
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static inline float vfpu_cos_from_reduced(uint32_t angle, bool negate) {
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if (angle >= 0x00800000u) {
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angle = 0x01000000u - angle;
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negate = !negate;
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}
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return (negate ? -1.0f : +1.0f) * float(int32_t(vfpu_sin_fixed(0x00800000u - angle))) * 3.7252903e-09f; // 0x1p-28f
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static inline uint32_t vfpu_bits_from_float(float f) {
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uint32_t bits;
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memcpy(&bits, &f, sizeof(bits));
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return bits;
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}
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static inline float vfpu_float_from_bits(uint32_t bits) {
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@@ -1589,36 +1582,75 @@ static inline float vfpu_float_from_bits(uint32_t bits) {
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return f;
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}
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float vfpu_sin(float x) {
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uint32_t bits, angle;
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static inline int vfpu_clz64_nonzero(uint64_t v) {
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return (v >> 32) != 0 ? (int)clz32_nonzero(uint32_t(v >> 32)) : 32 + (int)clz32_nonzero(uint32_t(v));
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}
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// Float bits of v * 2^-fracBits, with the sign bit set if negative (also for zero). v has to fit
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// in a float's significand, which every result here does, since the VFPU keeps 22 bits.
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static inline uint32_t vfpu_fixed_to_bits(uint64_t v, int fracBits, bool negative) {
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const uint32_t sign = negative ? 0x80000000u : 0u;
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if (v == 0)
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return sign;
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const int top = 63 - vfpu_clz64_nonzero(v);
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const uint64_t significand = top <= 23 ? v << (23 - top) : v >> (top - 23);
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return sign + (uint32_t(top - fracBits + 127) << 23) + (uint32_t(significand) & 0x007FFFFFu);
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}
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static inline uint32_t vfpu_sin_from_reduced(uint32_t angle, bool negate) {
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if (angle > 0x00800000u) angle = 0x01000000u - angle;
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return vfpu_fixed_to_bits(vfpu_sin_fixed(angle), 28, negate);
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}
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static inline uint32_t vfpu_cos_from_reduced(uint32_t angle, bool negate) {
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if (angle >= 0x00800000u) {
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angle = 0x01000000u - angle;
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negate = !negate;
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}
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return vfpu_fixed_to_bits(vfpu_sin_fixed(0x00800000u - angle), 28, negate);
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}
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// These work on float bits throughout. A float made from a constant NaN bit pattern can come out
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// quieted (MSVC does this), and the VFPU's NaN is signaling.
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static uint32_t vfpu_sin_bits(uint32_t bits) {
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uint32_t angle;
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bool odd;
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memcpy(&bits, &x, sizeof(bits));
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if (!vfpu_sin_reduce(bits, &angle, &odd))
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return vfpu_float_from_bits((bits & 0x80000000u) ^ 0x7F800001u);
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return (bits & 0x80000000u) ^ 0x7F800001u;
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return vfpu_sin_from_reduced(angle, (bits >> 31) != odd);
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}
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float vfpu_cos(float x) {
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uint32_t bits, angle;
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static uint32_t vfpu_cos_bits(uint32_t bits) {
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uint32_t angle;
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bool odd;
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memcpy(&bits, &x, sizeof(bits));
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if (!vfpu_sin_reduce(bits, &angle, &odd))
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return vfpu_float_from_bits(0x7F800001u);
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return 0x7F800001u;
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return vfpu_cos_from_reduced(angle, odd);
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}
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// Shares the argument reduction; the reduction ignores the sign bit.
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float vfpu_sin(float x) {
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return vfpu_float_from_bits(vfpu_sin_bits(vfpu_bits_from_float(x)));
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}
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float vfpu_cos(float x) {
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return vfpu_float_from_bits(vfpu_cos_bits(vfpu_bits_from_float(x)));
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}
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// Reduces the angle once for both.
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void vfpu_sincos(float a, float &s, float &c) {
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uint32_t bits, angle;
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const uint32_t bits = vfpu_bits_from_float(a);
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uint32_t angle;
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bool odd;
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memcpy(&bits, &a, sizeof(bits));
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uint32_t sinBits, cosBits;
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if (!vfpu_sin_reduce(bits, &angle, &odd)) {
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s = vfpu_float_from_bits((bits & 0x80000000u) ^ 0x7F800001u);
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c = vfpu_float_from_bits(0x7F800001u);
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return;
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sinBits = (bits & 0x80000000u) ^ 0x7F800001u;
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cosBits = 0x7F800001u;
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} else {
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sinBits = vfpu_sin_from_reduced(angle, (bits >> 31) != odd);
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cosBits = vfpu_cos_from_reduced(angle, odd);
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}
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s = vfpu_sin_from_reduced(angle, (bits >> 31) != odd);
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c = vfpu_cos_from_reduced(angle, odd);
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s = vfpu_float_from_bits(sinBits);
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c = vfpu_float_from_bits(cosBits);
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}
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// The tables for the fast paths (see VFPUFastSegment). bias moves the segment's binade to the
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@@ -1689,74 +1721,73 @@ static inline uint32_t vfpu_asin_fixed(uint32_t x) {
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}
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float vfpu_asin(float x) {
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uint32_t bits;
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memcpy(&bits, &x, sizeof(x));
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uint32_t sign = bits & 0x80000000u;
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bits = bits & 0x7FFFFFFFu;
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if(bits > 0x3F800000u) {
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bits = 0x7F800001u ^ sign;
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memcpy(&x, &bits, sizeof(x));
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return x;
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const uint32_t bits = vfpu_bits_from_float(x);
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const uint32_t sign = bits & 0x80000000u;
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const uint32_t abs = bits & 0x7FFFFFFFu;
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uint32_t result;
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if (abs > 0x3F800000u) {
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result = 0x7F800001u ^ sign;
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} else {
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// |x| * 2^23, truncated. Anything below 2^-23, denormals included, gives 0.
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const int e = int(abs >> 23);
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const uint32_t significand = (abs & 0x007FFFFFu) | 0x00800000u;
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const uint32_t fixed = e < 104 ? 0 : significand >> (127 - e);
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result = vfpu_fixed_to_bits(vfpu_asin_fixed(fixed), 30, sign != 0);
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}
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return vfpu_float_from_bits(result);
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}
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bits = vfpu_asin_fixed(uint32_t(int32_t(fabsf(x) * 8388608.0f))); // 0x1p23
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x=float(int32_t(bits)) * 9.31322574615478515625e-10f; // 0x1p-30
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if(sign) x = -x;
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return x;
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static uint32_t vfpu_exp2_bits(uint32_t bits) {
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const uint32_t abs = bits & 0x7FFFFFFFu;
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const bool negative = (bits >> 31) != 0;
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if (abs <= 0x007FFFFFu) {
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// Denormals are treated as 0.
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return 0x3F800000u;
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}
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if (abs > 0x7F800000u) {
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// NaN gets NaN.
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return 0x7F800001u;
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}
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if (negative && abs >= 0x42FC0000u) {
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// -126 and below get 0 (exp2(-126) is the smallest normal, but yes, -126 gives +0).
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return 0;
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}
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if (!negative && abs >= 0x43000000u) {
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// 128 and above get infinity.
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return 0x7F800000u;
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}
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// x * 2^23 truncated toward zero, and one less for a negative x. Yes, really.
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const int e = int(abs >> 23);
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const uint32_t significand = (abs & 0x007FFFFFu) | 0x00800000u;
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int32_t fixed = e >= 127 ? int32_t(significand << (e - 127)) : (e < 104 ? 0 : int32_t(significand >> (127 - e)));
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if (negative)
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fixed = -fixed - 1;
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// The fraction's exp2 is in [1, 2), so its significand bits are the offset from 1.0.
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const uint32_t frac = uint32_t(fixed) & 0x007FFFFFu;
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const uint32_t significandBits = frac == 0 ? 0 : vfpu_interp_bits(vfpu_exp2_segments, frac) - 0x3F800000u;
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return 0x3F800000u + (uint32_t(fixed) & 0xFF800000u) + significandBits;
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}
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float vfpu_exp2(float x) {
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int32_t bits;
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memcpy(&bits, &x, sizeof(bits));
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if((bits & 0x7FFFFFFF) <= 0x007FFFFF) {
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// Denormals are treated as 0.
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return 1.0f;
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}
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if(x != x) {
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// NaN gets NaN.
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bits = 0x7F800001u;
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memcpy(&x, &bits, sizeof(x));
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return x;
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}
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if(x <= -126.0f) {
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// Small numbers get 0 (exp2(-126) is smallest positive non-denormal).
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// But yes, -126.0f produces +0.0f.
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return 0.0f;
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}
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if(x >= +128.0f) {
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// Large numbers get infinity.
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bits = 0x7F800000u;
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memcpy(&x, &bits, sizeof(x));
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return x;
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}
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bits = int32_t(x * 0x1p23f);
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if(x < 0.0f) --bits; // Yes, really.
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// The fraction's exp2 is in [1, 2), so its significand bits are the offset from 1.0.
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const uint32_t frac = bits & 0x007FFFFF;
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const int32_t significand = frac == 0 ? 0 : int32_t(vfpu_interp_bits(vfpu_exp2_segments, frac) - 0x3F800000u);
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bits = int32_t(0x3F800000) + (bits & int32_t(0xFF800000)) + significand;
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memcpy(&x, &bits, sizeof(bits));
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return x;
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return vfpu_float_from_bits(vfpu_exp2_bits(vfpu_bits_from_float(x)));
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}
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float vfpu_rexp2(float x) {
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return vfpu_exp2(-x);
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return vfpu_float_from_bits(vfpu_exp2_bits(vfpu_bits_from_float(x) ^ 0x80000000u));
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}
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float vfpu_log2(float x) {
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uint32_t bits;
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memcpy(&bits, &x, sizeof(bits));
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static uint32_t vfpu_log2_bits(uint32_t bits) {
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if ((bits & 0x7FFFFFFFu) <= 0x007FFFFFu) {
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// Denormals (and zeroes) get -inf.
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return vfpu_float_from_bits(0xFF800000u);
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return 0xFF800000u;
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}
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if (bits & 0x80000000u) {
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// Other negatives get NaN.
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return vfpu_float_from_bits(0x7F800001u);
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return 0x7F800001u;
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}
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if ((bits >> 23) == 255u) {
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// NaN gets NaN, +inf gets +inf.
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return vfpu_float_from_bits(0x7F800000u + ((bits & 0x007FFFFFu) != 0));
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return 0x7F800000u + ((bits & 0x007FFFFFu) != 0);
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}
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// The result is exponent + log2(1.mantissa), truncated toward zero to 22 significant bits: a
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// step of 2^-22 for exponents 0 and 1, twice that for each doubling of the exponent after that,
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@@ -1777,9 +1808,13 @@ float vfpu_log2(float x) {
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// In units of 2^-41.
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const int64_t y = (int64_t(c0 + square) << 17) + m * x2;
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const int64_t frac = exponent >= 0 ? (y & ~(step - 1)) : -(-y & ~(step - 1));
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const float result = float(double(exponent) + double(frac) * 0x1p-41);
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// A negative sum truncated to zero keeps its sign.
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return exponent < 0 && result == 0.0f ? -0.0f : result;
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const int64_t sum = (int64_t(exponent) << 41) + frac;
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return vfpu_fixed_to_bits(uint64_t(sum < 0 ? -sum : sum), 41, exponent < 0);
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}
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float vfpu_log2(float x) {
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return vfpu_float_from_bits(vfpu_log2_bits(vfpu_bits_from_float(x)));
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}
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float vfpu_rcp(float x) {
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