mirror of
https://github.com/hrydgard/ppsspp.git
synced 2026-10-01 14:58:14 +00:00
The crash handler's instruction analyzer only understood mov/movzx/movsx, so a fault on an FP or SIMD load/store (used for lwc1/swc1 and lv.q/sv.q in the x86 JIT) couldn't be classified. Add decoding for movss (scalar, distinguished from movups by the mandatory 0xF3 prefix), movups, and movaps, and add an InstructionClass field (GPR/FP/FP_SIMD) so callers know how to interpret the decoded register operand. Covered by new unit tests in TestX64Emitter.cpp that emit each instruction and check the analyzer's output against it.